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Publication date	- (ex : 2010-2015)

An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS

Conference

Chen, Gregory K.; Knag, Phil C.; Tokunaga, Carlos; Krishnamurthy, Ram K.

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2022 IEEE Symposium on. :68-69 Jun, 2022

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DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm

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25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range

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Anders, Mark A.; Kaul, Himanshu; Kim, Seongjong; Chen, Gregory K.; Kumar, Raghavan; Sumbul, H. Ekin; Knag, Phil C.; Kar, Monodeep; Hsu, Steven K.; Agarwal, Amit; Suresh, Vikram; Mathew, Sanu K.; Krishnamurthy, Ram K.; De, Vivek

2020 IEEE International Solid-State Circuits Conference - (ISSCC) Solid-State Circuits Conference - (ISSCC), 2020 IEEE International. :396-398 Feb, 2020

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A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS

Conference

Knag, Phil C.; Chen, Gregory K.; Sumbul, H. Ekin; Kumar, Raghavan; Anders, Mark A.; Kaul, Himanshu; Hsu, Steven K.; Agarwal, Amit; Kar, Monodeep; Kim, Seongjong; Krishnamurthy, Ram K.

2020 IEEE Symposium on VLSI Circuits VLSI Circuits, 2020 IEEE Symposium. :1-2 Jun, 2020

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A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS

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Chen, Gregory K.; Kumar, Raghavan; Sumbul, H. Ekin; Knag, Phil C.; Krishnamurthy, Ram K.

2018 IEEE Symposium on VLSI Circuits VLSI Circuits, 2018 IEEE Symposium on. :255-256 Jun, 2018

Full Text (IEEE) Find it@PNU

DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm

Academic Journal

Lin, Chuan-Tung; Wang, Dewei; Zhang, Bo; Chen, Gregory K.; Knag, Phil C.; Krishnamurthy, Ram Kumar; Seok, Mingoo

IEEE JOURNAL OF SOLID-STATE CIRCUITS; SEP 28 2023, 12p.

Full Text (IEEE) Web of Science JCR 저널정보 Scopus Find it@PNU

An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS

Periodical

Chen, Gregory K.; Knag, Phil C.; Tokunaga, Carlos; Krishnamurthy, Ram K.

IEEE Journal of Solid-State Circuits; 2023, Vol. 58 Issue: 4 p1117-1128, 12p

Full Text (IEEE) Web of Science JCR 저널정보 Scopus Find it@PNU

A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS.

Academic Journal

Knag, Phil C.; Chen, Gregory K.; Sumbul, H. Ekin; Kumar, Raghavan; Hsu, Steven K.; Agarwal, Amit; Kar, Monodeep; Kim, Seongjong; Anders, Mark A.; Kaul, Himanshu; Krishnamurthy, Ram K.

IEEE Journal of Solid-State Circuits; Apr2021, Vol. 56 Issue 4, p1082-1092, 11p

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A 4096-Neuron 1M-Synapse 3.8-pJ/SOP Spiking Neural Network With On-Chip STDP Learning and Sparse Weights in 10-nm FinFET CMOS.

Academic Journal

Chen, Gregory K.; Kumar, Raghavan; Sumbul, H. Ekin; Knag, Phil C.; Krishnamurthy, Ram K.

IEEE Journal of Solid-State Circuits; Apr2019, Vol. 54 Issue 4, p992-1002, 11p

Full Text (IEEE) Web of Science JCR 저널정보 Scopus Find it@PNU

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