부산대학교 도서관

This article presents a high-efficiency multi-phase switched-capacitor (SC) dc–dc converter targeting on fast dynamic voltage scaling (DVS) applications. The proposed always-dual-path multi-phase scheme as well as three-step voltage conversion ratio (VCR) transition strategy can ensure dynamic $C_{\mathrm {FLY}}$ reallocation to achieve continuous output charge delivery for both steady state and VCR transition operations without extra $C_{\mathrm {FLY}}$ . Together with the customized digital controller, the proposed SC converter can enable $C_{\mathrm {LOAD}}$ -free operation for fast and robust DVS transitions while relaxing the associated dynamic loss. We further investigate on an all NMOS power switch implementation to optimize both the DVS speed and switching loss. Fabricated in 65-nm CMOS, the proposed SC converter achieves step-down VCRs of 5:4/3/2/1. It can provide an output voltage $V_{\mathrm {OUT}}$ from 0.16 to 0.96 V with an input voltage $V_{\mathrm {IN}}$ of 1.2 V, while achieving a measured steady state peak power conversion efficiency (PCE) of 93.4%. The measured peak dynamic PCE when switching between 5:4 and 5:3 at a VCR transition frequency ( $f_{\mathrm {VCR\_{}TRAN}}$ ) of 100 kHz is 89.6%. With $f_{\mathrm {VCR\_{}TRAN}}$ increasing from 1 to 800 kHz, the measured dynamic PCE droop for 5: $4\leftrightarrow ~5$ :3 is only 0.83%. This work achieves high peak PCE over a wide VCR range while exhibiting a DVS speed up to 222.5 mV/ns, corresponding to a $\sim 2\times $ improvement over similar prior arts.