KOR

e-Article

RF performance enhancement of 28nm FD-SOI transistors down to cryogenic temperature using back biasing
Document Type
Conference
Source
2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023
Subject
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Nuclear Engineering
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Radio frequency
Performance evaluation
Silicon-on-insulator
Cryogenics
Threshold voltage
Behavioral sciences
Transistors
Language
ISSN
2156-017X
Abstract
In this study, we investigate the back-gate bias impact on the electrical behavior of FD-SOI transistors from room temperature down to 4.2K. For the first time, we demonstrate how to improve the RF performances of transistors and circuits for cryoCMOS applications. DC and RF characterizations are presented providing an insight on the underlying physics. We then defined optimization guidelines and applied it to a Low Noise Amplifier (LNA) for operation at 4.2K