e-Article
Two level bulk preload branch prediction
Document Type
Conference
Author
Source
2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA) High Performance Computer Architecture (HPCA2013), 2013 IEEE 19th International Symposium on. :71-82 Feb, 2013
Subject
Language
ISSN
1530-0897
Abstract
This paper describes the large capacity hierarchical branch predictor in the 5.5 GHz IBM zEnterprise EC12 microprocessor. Performance analyses in a simulation model and on zEC12 hardware demonstrate the benefit of this hierarchy compared to a smaller one level predictor.