e-Article
Latch-up in Integrated Circuits Under Single and Periodic Electrical Overstress
Document Type
Conference
Source
2022 Moscow Workshop on Electronic and Networking Technologies (MWENT) Electronic and Networking Technologies (MWENT), 2022 Moscow Workshop on. :1-7 Jun, 2022
Subject
Language
Abstract
This paper describes the results of sensitivity test to latch-up of several types of ICs (SRAM, EEPROM memory, ADC, microcontroller) caused by single and multiple electrical overstresses. It was shown, that electrical strike with a high-repetition rate increases the sensitivity and vulnerability of ICs to latch-up. The article describes some aspects of the test procedure, which may affect on IC’s sensitivity results.