학술논문
New insights on bottom layer thermal stability and laser annealing promises for high performance 3D VLSI
Document Type
Conference
Author
Fenouillet-Beranger, C.; Mathieu, B.; Previtali, B.; Samson, M-P.; Rambal, N.; Benevent, V.; Kerdiles, S.; Barnes, J-P.; Barge, D.; Besson, P.; Kachtouli, R.; Casse, M.; Garros, X.; Laurent, A.; Nemouchi, F.; Huet, K.; Toque-Tresonne, I.; Lafond, D.; Dansas, H.; Aussenac, F.; Druais, G.; Perreau, P.; Richard, E.; Chhun, S.; Petitprez, E.; Guillot, N.; Deprat, F.; Pasini, L.; Brunet, L.; Lu, V.; Reita, C.; Batude, P.; Vinet, M.
Source
2014 IEEE International Electron Devices Meeting Electron Devices Meeting (IEDM), 2014 IEEE International. :27.5.1-27.5.4 Dec, 2014
Subject
Language
ISSN
0163-1918
2156-017X
2156-017X
Abstract
For the first time the maximum thermal budget of in-situ doped source/drain State Of The Art (SOTA) FDSOI bottom MOSFET transistors is quantified to ensure transistors stability in Sequential 3D (CoolCube™) integration. We highlight no degradation of Ion/Ioff trade-off up to 550°C. Thanks to both metal gate work-function stability especially on short devices and silicide stability improvement, the top MOSFET temperature could be relaxed up to 500°C. Laser anneal is then considered as a promising candidate for junctions activation. Based on in-depth morphological and electrical characterizations it demonstrates very promising results for high performance Sequential 3D integration.