학술논문
Comparative experimental study of junctionless and inversion-mode nanowire transistors for analog applications
Document Type
Conference
Author
Source
2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) VLSI Technology, Systems and Applications (VLSI-TSA), 2020 International Symposium on. :126-127 Aug, 2020
Subject
Language
Abstract
We fabricated junction less and inversion-mode monocrystalline nanowire nMOSFETs down to L=18nm gate length and W=20nm width. We demonstrate record performance of nanowire junction less transistors for analog applications: $A_{VT}=1.4mV \cdot \mu$ m matching, $A_{v0}=62dB$ gain (L=200nm), $f_{T}=126GHz$ cut-off frequency and $f_{MAX}=182GHz$ maximum operating frequency (L=35nm). Junction Less transistor performances even exceed those of inversion-mode ones in terms of back-bias capability, low-frequency noise, hotcarrier degradation and fMAX. This is explained by junction less physics: channel length modulation, bulk conduction and high channel-depth sensitivity to back bias.