학술논문
Demonstration of an extendable and industrial 300mm BEOL integration for the 65-nm technology node
Document Type
Conference
Author
Hinsinger, O.; Fox, R.; Sabouret, E.; Goldberg, C.; Verove, C.; Besling, W.; Brun, P.; Josse, E.; Monget, C.; Belmont, O.; Van Hassel, J.; Sharma, B.G.; Jacquemin, J.P.; Vannier, P.; Humbert, A.; Bunel, D.; Gonella, R.; Mastromatteo, E.; Reber, D.; Farcy, A.; Mueller, J.; Christie, P.; Nguyen, V.H.; Cregut, C.; Berger, T.
Source
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. Electron devices meeting Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International. :317-320 2004
Subject
Language
Abstract
Given the much discussed challenges of interconnect scaling at the 65-nm node, the choice of process architecture is a key determinant of performance and extendibility. An alternate trench-first with hardmask integration is described in this work, including subsequent benefits. BEOL design rules are detailed for the 65-nm architecture, supporting both "low-k" and "ultra-low-k" backends, satisfying RC scaling requirements. Electrical parametric performance and yield are presented for a fully-integrated 300mm backend utilizing 65-nm design rules demonstrating the viability of this architecture for the 65-nm node and beyond.