학술논문

14nm FDSOI upgraded device performance for ultra-low voltage operation
Document Type
Conference
Source
2015 Symposium on VLSI Technology (VLSI Technology) VLSI Technology (VLSI Technology), 2015 Symposium on. :T168-T169 Jun, 2015
Subject
Computing and Processing
Power, Energy and Industry Applications
Robotics and Control Systems
Transportation
MOS devices
Silicon compounds
Logic gates
Performance evaluation
Transistors
Delays
Capacitance
Language
ISSN
0743-1562
2158-9682
Abstract
A performance upgrade of our 14nm FDSOI technology is reported in this paper. Compared to our previous 14nm FDSOI assessment, a −17% delay at the same leakage is demonstrated. We show that the AC performance of 28nm FDSOI at a 0.9V supply voltage is reached at 0.6V in 14nm FDSOI technology. This corresponds to a 50% increase in frequency at the same dynamic power, or a 65% power saving at the same operation frequency. The transistors are optimized to provide better drive current and, for the first time, a novel SiBCN low-k spacer material is successfully integrated in a gate-first FDSOI technology, providing a 10% reduction in gate-to-source/drain parasitic capacitance.