학술논문

Neighbor selection for variance reduction in I/sub DDQ/ and other parametric data
Document Type
Conference
Source
Proceedings. International Test Conference International test conference Test Conference, 2002. Proceedings. International. :1240-1248 2002
Subject
Components, Circuits, Devices and Systems
Signal Processing and Analysis
Power, Energy and Industry Applications
Logic testing
Nearest neighbor searches
Integrated circuit testing
Large scale integration
Production
Equations
Laboratories
Data engineering
Design engineering
Logic design
Language
ISSN
1089-3539
Abstract
The subject of this paper is variance reduction and nearest neighbor residual estimates for I/sub DDQ/ and other continuous-valued test measurements. The key, new concept introduced is data-driven neighborhood identification about a die to reduce the variance of good and faulty I/sub DDQ/ distributions. Using LSI Logic production data, neighborhood selection techniques are demonstrated. The main contribution of the paper is variance reduction by the systematic use of the die location and wafer- or lot-level patterns and improved identification of die outliers of continuous-valued test data such as I/sub DDQ/.