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Highly Automated Formal Verification of Arithmetic Circuits
Sayed-Ahmed, Amr
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Konzeption und Anforderungsdefinition eines elektronischen Rückmeldesystems für schulische Leistungsdaten
Stauke, Emese
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Dust, Emese
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Embedded Brain Reading
Kirchner, Elsa Andrea
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Quality and Quantity in Robustness-Checking Using Formal Techniques
Frehse, Stefan
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SystemC Through the Looking Glass : Non-Intrusive Analysis of Electronic System Level Designs in SystemC
Stoppe, Jannis Ulrich
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Stop, Jannis Ulrich
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[Testing of Reversible Circuits]
Zhang, Hongyan
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Scalable Design and Synthesis of Reversible Circuits
Schönborn, Eleonora
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Symbolic error metric determination for approximate computing
Chandrasekharan, Arun
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Integrated Module Testing and Module Verification
Mangels, Tatiana
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Model checking memory-related properties of hardware/software codesigns
Pockrandt, Marcel
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ieee transactions on computer-aided design of integrated circuits & systems
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2018 design, automation & test in europe conference & exhibition (date), design, automation & test in europe conference & exhibition (date), 2018
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2019 design, automation & test in europe conference & exhibition (date), design, automation & test in europe conference & exhibition (date), 2019
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journal of electronic testing: theory and applications
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13th ieee symposium on design and diagnostics of electronic circuits and systems, design and diagnostics of electronic circuits and systems (ddecs), 2010 ieee 13th international symposium on
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2009 design, automation & test in europe conference & exhibition, design, automation & test in europe conference & exhibition, 2009. date '09.
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2012 design, automation & test in europe conference & exhibition (date), design, automation & test in europe conference & exhibition (date), 2012
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2016 ieee 46th international symposium on multiple-valued logic (ismvl), multiple-valued logic (ismvl), 2016 ieee 46th international symposium on
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