학술논문
A Low-power High-resolution Band-pass Sigma-delta ADC for Accelerometer Applications
Document Type
Academic Journal
Author
Source
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 2017-06 17(3):438-445
Subject
Language
Korean
ISSN
1598-1657
2233-4866
2233-4866
Abstract
This paper presents a low-power highresolution band-pass ΣΔ ADC for accelerometer applications. The proposed band-pass ΣΔ ADC consists of a high-performance 6-th order feedforward ΣΔ modulator with 1-bit quantization and a low-power, area-efficient digital filter. The ADC is fabricated in 180 ㎚ 1P6M mixed-signal CMOS process with a die area of 5 ㎟. This high-resolution ADC got 90 dB peak signal to noise plus distortion ratio (SNDR) and 96 ㏈ dynamic range (DR) over 4 ㎑ bandwidth, while the intermediate frequency (IF) is shifting from 100 ㎑ to 200 ㎑. The power dissipation of the chip is 5.6 ㎽ under 1.8 V (digital)/3.3 V (analog) power supply.