학술논문
CMOS Compatible Process Integration of SOT-MRAM with Heavy-Metal Bi-Layer Bottom Electrode and 10ns Field-Free SOT Switching with STT Assist
Document Type
Conference Paper
Author
Sato, N.; Allen, G.A.; Benson, W.P.; Christenson, M.; Gosavi, T.A.; Kabir, N.A.; Krist, B.J.; O'Brien, K.P.; Oguz, K.; Walker, E.S.; Metz, M.V.; Turkot, B.; Yoo, H.J.; Young, I.A.; Buford, B.; Chakraborty, A.; Heil, P.E.; Patil, R.R.; Pellegren, J.; Smith, A.K.; Hentges, P.J.; Seth, M.; Wiegand, C.J.
Source
In: Digest of Technical Papers - Symposium on VLSI Technology , 2020 IEEE Symposium on VLSI Technology, VLSI Technology 2020 - Proceedings. (Digest of Technical Papers - Symposium on VLSI Technology, June 2020, 2020-June)
Subject
Language
English
ISSN
07431562