학술논문

1T1R In-Memory Compute for Winner Takes All Application in Kohonen Neural Networks
Document Type
Conference
Source
2022 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2022 IEEE International Symposium on. :1561-1565 May, 2022
Subject
Components, Circuits, Devices and Systems
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Self-organizing feature maps
Resistance
Program processors
Competitive learning
Neural networks
Logic functions
In-memory computing
In-memory compute
RRAM
Kohonen Neural Networks
Language
ISSN
2158-1525
Abstract
In-memory computing is a promising candidate for overcoming the von Neumann memory wall and accelerating data processing in neural network applications. We propose a ITIR-based approach to carry out an efficient in-memory computation of the minimum logic function to be executed in the form of a series of 1-bit search operations similar to modern associative processors. We study the proposed design in the context of Kohonen Neural Networks that are also known as self-organizing maps. They are based on competitive learning where the minimum-search operation is a crucial part in the learning process. We study the trade off of different low-to-high resistance state windows associated with different endurance levels in the presence of process variations. We demonstrate ~0-4% reduction in the MNIST test dataset accuracy for the different scenarios. We report a maximum of 6fJ for the 1-bit search operation.