학술논문

Efficient Hierarchical State Vector Simulation of Quantum Circuits via Acyclic Graph Partitioning
Document Type
Conference
Source
2022 IEEE International Conference on Cluster Computing (CLUSTER) CLUSTER Cluster Computing (CLUSTER), 2022 IEEE International Conference on. :289-300 Sep, 2022
Subject
Computing and Processing
Computational modeling
Graphics processing units
Computer architecture
Cluster computing
Supercomputers
Partitioning algorithms
Computational efficiency
quantum circuit simulation
graph partitioning
state vector
gpu computation
locality
parallel computing
directed acyclic graph
dag partitioning
Language
ISSN
2168-9253
Abstract
Early but promising results in quantum computing have been enabled by the concurrent development of quan-tum algorithms, devices, and materials. Classical simulation of quantum programs has enabled the design and analysis of algorithms and implementation strategies targeting current and anticipated quantum device architectures. In this paper, we present a graph-based approach to achieving efficient quantum circuit simulation. Our approach involves partitioning the graph representation of a given quantum circuit into acyclic sub-graphs/circuits that exhibit better data locality. Simulation of each sub-circuit is organized hierarchically, with the iterative construction and simulation of smaller state vectors, improving overall performance. Also, this partitioning reduces the number of passes through data, improving the total computation time. We present three partitioning strategies and observe that acyclic graph partitioning typically results in the best time-to-solution. In contrast, other strategies reduce the partitioning time at the expense of potentially increased simulation times. Experimental evaluation demonstrates the effectiveness of our approach.