부산대학교 도서관

Voltage surges induced by electrostatic discharge (ESD) impacts on the backside of an integrated circuit (IC) chip in flip-chip packaging potentially causes reliability problems and even leads to malfunctioning. On-chip voltage waveform monitor circuits on its frontside evaluate the surge as high as 200 mV when ESD gun at 200 V is discharged to the Si substrate backside through the contact resistance of 5 kto the backside of a 350 µm thick Si substrate. The distribution of voltages over the frontside area of an IC chip is measured and explained with full-system level backside ESD simulation.