학술논문

112G+7-Bit DAC-Based Transmitter in 7-nm FinFET With PAM4/6/8 Modulation
Document Type
Periodical
Source
IEEE Solid-State Circuits Letters IEEE Solid-State Circuits Lett. Solid-State Circuits Letters, IEEE. 5:21-24 2022
Subject
Components, Circuits, Devices and Systems
Computing and Processing
Clocks
Signal to noise ratio
Detectors
Transmitters
Time-domain analysis
Sensitivity
Loss measurement
DAC
PAM4
PAM6
PAM8
SERDES
transmitter (TX)
Language
ISSN
2573-9603
Abstract
This letter describes a 56 Gbaud 7-bit DAC-based transmitter (TX) demonstrating data rates of 112, 140, and 168 Gb/s in PAM4, PAM6, and PAM8, respectively. The TX with 1.2-Vppd high-swing driver is implemented in a 7-nm FinFET process. Time domain analysis is performed to compare PAM modulation formats. The power efficiency is 1.5 pJ/b (PAM4) and 1.0 pJ/b (PAM8).