학술논문

A 389TOPS/W, 1262fps at 1Meps Region Proposal Integrated Circuit for Neuromorphic Vision Sensors in 65nm CMOS
Document Type
Conference
Source
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) Solid-State Circuits Conference (A-SSCC), 2021 IEEE Asian. :1-3 Nov, 2021
Subject
Components, Circuits, Devices and Systems
Neuromorphics
Surveillance
Redundancy
Vision sensors
Streaming media
Traffic control
Data transfer
Language
Abstract
Neuromorphic vision sensors (NVS) [1] are key enablers in traffic monitoring and surveillance systems that exploit the temporal redundancy in video streams to get $\gt 2\mathrm{X}$ energy savings by blank frame detection (Fig. 1). Such concept of event driven processing has been used to reduce system energy for regular cameras as well [2]. However, an object typically occupies a fraction of the full image frame (Fig. 1) leading to a significant spatial redundancy in the image. Hence, an energy-efficient hardware is required to detect the region of interests (RoIs) in the valid frames to trigger an object recognition engine only for the RoIs. For a binary image, the region proposal can be performed by the connected component labeling (CCL) algorithm [2]. However, CCL scans the image in a raster fashion to calculate the ROIs leading to longer execution time and higher energy dissipation due to enormous data transfer. On the contrary, emerging in-memory [3], [4] and near-memory [5] computing approaches are a way to eliminate the data transfer cost and latency, promising further energy savings. In this paper, we propose 9T-SRAM based near and in-memory computing region proposal integrated circuit (RPIC) leveraging the $1 -\mathrm{D}$ projections of the objects on the vertical and horizontal axes. Further, we propose an iterative and selective search (ISS) algorithm to overcome overlapped projections among objects and provide an accurate number of objects and their exacts coordinates.