학술논문

Implementation and Evaluation of Block Cipher Algorithm with Content Addressable Memory-Based Massive-Parallel SIMD Matrix Core
Document Type
Conference
Source
2021 IEEE 10th Global Conference on Consumer Electronics (GCCE) Consumer Electronics (GCCE), 2021 IEEE 10th Global Conference on. :913-914 Oct, 2021
Subject
Aerospace
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineering Profession
Fields, Waves and Electromagnetics
General Topics for Engineers
Photonics and Electrooptics
Power, Energy and Industry Applications
Transportation
Performance evaluation
Ciphers
Power demand
Conferences
Mobile handsets
Encryption
Batteries
Language
Abstract
In recent years, many people have been handing various information using consumer mobile devices. Therefore, it is important to efficiently process several multimedia data with a single device. In this paper, we propose an processing architecture of content addressable memory-based massive-parallel SIMD matrix processor that can realize iterative arithmetic processing in parallel and can realize match search processing at a high speed. As performance verification, we implement the AES, which is standard encryption, and the PRESENT, which is lightweight encryption, on the proposed processor. The results confirmed that AES and PRESENT processing are about 2.5 times and about 90 times faster than the Raspberry Pi 4, respectively.