학술논문

Metal Wet Recess Challenges and Solutions for beyond 7nm Fully Aligned Via Integration
Document Type
Conference
Source
2021 IEEE International Interconnect Technology Conference (IITC) Interconnect Technology Conference (IITC), 2021 IEEE International. :1-3 Jul, 2021
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Resistance
Conferences
Metals
Surfaces
Insulators
Cu
Co
TaN
Wet etch
recess
fully aligned via
Language
ISSN
2380-6338
Abstract
The Fully aligned via scheme (FAV) is known to mitigate the via misalignment issues that drive a lower Vmax and limits the contact area between the via and the underlying line. Even though the overall benefits of FAV are well known, the key detractors and their contributions are not well understood. One of the key challenges in FAV integration is the need to create of topography which can be either achieved by recessing the metal lines or by selective insulator deposition. Wet recess process has been promising for enabling downstream integration learning of conformal cap deposition, ultra low-k gap-fill, and via landing on recessed area. In this paper wet recess challenges for topography creation and key process improvements that improve the resistance distribution are discussed.