부산대학교 도서관

The static random access memory (SRAM) of an ultralow power system-on-chip (SoC) was tested for single-event upsets (SEUs) using alpha particles and neutron beam sources. The measurements are compared to those of an SRAM-based field-programmable gate array (FPGA), built on a similar technology node. The results reveal opposite trends in the two devices regarding the upsets of the logic states, as well as differences in the dependence of SEU cross section (CS) on the operation voltage. The sensitivity of the SoC SRAM to multiple bit upsets with the different radiation sources is analyzed as well. The results demonstrate that the unique SoC design, which enables complete near/subthreshold operation, does not compromise the SoC bit upset tolerance compared to devices of similar technology node which operate at higher voltages.