부산대학교 도서관

Total ionizing dose (TID) effects at the 7-nm bulk FinFET node are characterized through changes in ring oscillator (RO) frequencies and current as a function of $V_{\mathrm {DD}}$ to model delay and power degradations in digital circuits. At the 7-nm node, tests show that gate delay decreased, and power consumption increased as TID increased. Percent increase in parameter degradations shows an inverse relationship with supply voltage, while percent increase in power consumption shows a direct relationship with supply voltage. Annealing at room temperature did not affect degradations. Circuit-level degradations for the 7-nm technology were less than 1% after TID exposure of 380 krad(SiO 2 ). These TID exposure results will provide insight to designers about circuit-level parameters of interest concerning the 7-nm technology node.