학술논문
30.2 A 1Tb 4b/Cell 144-Tier Floating-Gate 3D-NAND Flash Memory with 40MB/s Program Throughput and 13.8Gb/mm2 Bit Density
Document Type
Conference
Author
Khakifirooz, Ali; Balasubrahmanyam, Sriram; Fastow, Richard; Gaewsky, Kristopher H.; Ha, Chang Wan; Haque, Rezaul; Jungroth, Owen W.; Law, Steven; Madraswala, Aliasgar S.; Ngo, Binh; Naveen Prabhu, V; Rajwade, Shantanu; Ramamurthi, Karthikeyan; Shenoy, Rohit S.; Snyder, Jacqueline; Sun, Cindy; Thimmegowda, Deepak; Pathak, Bharat M.; Kalavade, Pranav
Source
2021 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2021 IEEE International. 64:424-426 Feb, 2021
Subject
Language
ISSN
2376-8606
Abstract
Continued improvement in the 3D NAND bit density is essential to satisfy the exponentially growing demand for data storage. The transition from 3b/cell (TLC) to 4b/cell (QLC) is a significant step towards delivering higher bit density. The increased program/erase (P/E) window, in 3D NAND technology, combined with improved program algorithms to alleviate interference from neighboring WL cells, has led to the successful deployment of two generations of QLC floating gate (FG) 3D NAND technology [1]. Further improvement in bit density, as well as the read and write performance will accelerate the adoption rate of QLC NAND into data-storage systems.