부산대학교 도서관

With the aggressive scaling of transistor dimensions, intrinsic device gains are dropping but the need for high-gain amplifiers still exists, resulting in a great interest in multi-stage amplifiers. Most existing amplifier topologies rely on Miller capacitors which achieve stability at the expense of reduced speed. In this paper, a new state feedback compensation strategy with gain enhancement using partial positive feedback is proposed whereby a multistage amplifier can be made output-compensated, thereby requiring no Miller capacitance while being able to drive a wide range of load capacitances. After a thorough theoretical analysis, a topology prototype is fabricated in a standard 130 nm CMOS technology and is able to drive loads from 90 nF-50 nF ( $\boldsymbol {\sim 555\times }$ ) using three discrete modes. The amplifier’s power and bandwidth are scalable depending on the expected capacitive load range, with a maximum power consumption of ${\mathrm {185~ \mu \text {W} }}$ from a ${\mathrm {1~ \text {V}}}$ supply. Comparison with state-of-the-art amplifiers shows superior small-signal performance and competitive large-signal performance while driving a significantly larger range of capacitive loads.