학술논문

BJT Device and Circuit Co-Optimization Enabling Bandgap Reference and Temperature Sensing in 7-nm FinFET
Document Type
Conference
Source
2018 48th European Solid-State Device Research Conference (ESSDERC) Solid-State Device Research Conference (ESSDERC), 2018 48th European. :86-89 Sep, 2018
Subject
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
General Topics for Engineers
Power, Energy and Industry Applications
FinFETs
Temperature sensors
Temperature measurement
Current density
Photonic band gap
Integrated circuit modeling
Temperature
Language
ISSN
2378-6558
Abstract
Caused by the increased power density and strong thermal gradients in today's large SoC/FPGAs in scaled process technologies, high-precision bandgap references and temperature sensors have become some of the most critical analog blocks. BJT devices form core components of such benchmark analog circuitry, thanks to their linear dependence on temperature. This paper discusses BJT device modeling and characterization results in 7-nm FinFET CMOS technology with regard to the BJT's variability and process spread. It provides guidance useful for the circuit implementation and quantifies the circuit application performance. Two test-chip device arrays are presented to demonstrate the feasibility of using BJTs in FinFET CMOS. A bandgap reference circuit is designed using the developed SPICE model. It shows measured max inaccuracy of $\pm \pmb{0.2\%}$. The presented merged layout structure further saves 20% of area.