부산대학교 도서관

Nanometer circuits suffer heavily from fabrication, transient and permanent failures. Circuit reliability has to be added to the design space. Probabilistic transfer matrix is an exact method to calculate the reliability of a circuit. Traditionally, logic gates are the basic blocks of this method with a constant reliability for all gates and all possible input vector combination. This paper introduces the importance of considering the transistor arrangement as a pre-processing step and presents an analysis of logic functions designed in single- and multi-stage versions. The results show that single-stage versions present higher reliability when compared to the multi-stage solution. These results confirm the higher robustness induced by more complex arrangements.