학술논문
Sub-quarter micron CMOS process for TiN-gate MOSFETs with TiO/sub 2/ gate dielectric formed by titanium oxidation
Document Type
Conference
Author
Source
1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325) VLSI technology VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on. :133-134 1999
Subject
Language
Abstract
We report here for the first time the integration of sub-quarter micron CMOSFETs on bulk silicon using an oxidized metal gate dielectric. A polysilicon capped physical vapor deposited (PVD) titanium nitride (TiN) was used as the gate electrode. Well behaved MOSFET characteristics were obtained. In this paper, we present results on the physical and electrical characterization of titanium dioxide (TiO/sub 2/) produced by oxidizing a thin PVD Ti film.