학술논문

A digitally controlled embedded SMPS with 2.3V to 5.5V input voltage for mobile SoCs
Document Type
Conference
Source
2016 International Symposium on Integrated Circuits (ISIC) Integrated Circuits (ISIC), 2016 International Symposium on. :1-4 Dec, 2016
Subject
Bioengineering
Components, Circuits, Devices and Systems
Computing and Processing
Engineering Profession
Power, Energy and Industry Applications
Signal Processing and Analysis
Language
Abstract
The design of a 40 nm CMOS technology embedded switched-mode power supply (SMPS) for low-power mobile silicon-on-chip (SoC) is presented. The embedded SMPS operates directly from a Li-Ion battery capable of a wide input voltage range of 2.3 to 5.5V while the maximum voltage rating of the transistors used is 2.75V. This is achieved using integrated low-power voltage regulators and a novel dip compensation scheme. In addition, the SMPS is designed to include PWM and PFM modes to achieve high power efficiency over a wide load current range. To take advantage of the advanced 40 nm process, the PWM controller is implemented digitally. The digital controller, consisting of a successive approximation (SAR) ADC, digital compensation filter, and digital sigma delta PWM, is implemented to minimize silicon area and achieve fast transient response. The SMPS switches at 4.5 MHz and has peak efficiency of 83%, delivering a load of 240 mW when converting from 3.6V to 1.2V. It is capable of delivering a maximum power of 960 mW.