학술논문

Analysis and Optimization of Product-Accumulation Section for Efficient Implementation of FIR Filters
Document Type
Periodical
Source
IEEE Transactions on Circuits and Systems I: Regular Papers IEEE Trans. Circuits Syst. I Circuits and Systems I: Regular Papers, IEEE Transactions on. 63(10):1701-1713 Oct, 2016
Subject
Components, Circuits, Devices and Systems
Finite impulse response filters
Adders
Delays
Optimization
Propagation delay
Complexity theory
Finite impulse response (FIR)
high-speed implementation
multiple constant multiplication (MCM)
product-accumulation section
retiming
Language
ISSN
1549-8328
1558-0806
Abstract
Most of the research on the implementation of finite impulse response (FIR) filter so far focuses on the optimization of the multiple constant multiplication (MCM) block. But it is observed that the product-accumulation section often contributes the major part of the critical path, such that the timing optimization of MCM block does not impact significantly on the overall speedup of the FIR filters. In this paper, a precise analysis and optimization of critical path for transposed direct from (TDF) FIR filters is proposed. The delay increment introduced by structural adders is estimated by comparing the delay of a tap and the corresponding delay of the coefficient multiplication only. Based on that, a novel implementation of the product-accumulation section of FIR filters is proposed by retiming the existing delays into the structural adders. It is also shown that the structural adders can be integrated with the MCM block and retimed together for further reduction of critical path. By using the proposed method, the increment of delay caused by the structural adders can be either completely eliminated or significantly reduced. Experimental results show that the critical path delay can be significantly reduced at the cost of very small area overhead. The overall area-delay performance and power-delay performance of the proposed method are superior to the existing methods.