학술논문

Debug Challenges for UTMI Low Pin Interface (ULPI) PHY in Nano Scale Technology
Document Type
Conference
Source
2015 IEEE International Conference on Computational Intelligence & Communication Technology Computational Intelligence & Communication Technology (CICT), 2015 IEEE International Conference on. :330-333 Feb, 2015
Subject
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Transportation
Universal Serial Bus
System-on-chip
Testing
Receivers
Sensitivity
Debugging
Conferences
ULPI
USB
nano scale
Low Pin Interface
UTMI
Language
Abstract
Real world communication are analog in nature whereas data processing happens in digital domain. This leads to generation of Mixed Signal design. With reference to USB, ULPI PHY serves as mixed design component that is present in most of today's gadgets. Because of its high speed and complexity, there is a need to check the individual design features of the ULPI PHY IP, which are hard to validate when the embedded in a System on Chip. The limitation comes from the fact that only a limited number of signals can be probed at SOC level. This paper describes the debug challenges and techniques used to validate these features before the IP goes into SOC.