학술논문

Design and test of a high-speed flash ADC mezzanine card for high-resolution and timing performance in nuclear structure experiments
Document Type
Conference
Source
2012 18th IEEE-NPSS Real Time Conference Real Time Conference (RT), 2012 18th IEEE-NPSS. :1-8 Jun, 2012
Subject
Nuclear Engineering
Power, Energy and Industry Applications
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
General Topics for Engineers
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Noise
Connectors
Phase locked loops
Detectors
Bandwidth
Energy resolution
Clocks
Language
Abstract
This board will be part of the upgrade for the new electronics for the EXOGAM2 (HP-Ge detector array) and NEDA (BC501A-based neutron detector array), therefore it was necessary to deal with the problem of providing a sampling card with high resolution for new gamma spectroscopy experiments while sampling at very high rates, with a broad bandwidth in order to preserve the shape for further analysis. Pulse shape analysis is of paramount importance in neutron detectors, such as NEDA, based on scintillators that are sensitive to ?-rays as well. High resolution and high speed are often two parameters which conform a trade-off and it is hard to achieve both simultaneously. The aforementioned constraints and the urge of building new sampling electronics to improve the signal analysis in nuclear physics experiments, led to the development of this FADC mezzanine This involves sampling rates up to 250 Msps preserving a high resolution of 11.3 effective bits in order to satisfy the experiment demands. In this work is described the design and the test bench proposed for a proper high speed ADC characterization system and the results obtained up to now.