학술논문

Measurement of microbump thermal resistance in 3D chip stacks
Document Type
Conference
Source
2012 28th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM) Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), 2012 28th Annual IEEE. :1-7 Mar, 2012
Subject
Power, Energy and Industry Applications
Computing and Processing
Components, Circuits, Devices and Systems
Thermal resistance
Semiconductor device measurement
Temperature sensors
Electrical resistance measurement
Temperature measurement
Microbump
Chip stack
Language
ISSN
1065-2221
Abstract
The thermal resistance of Pb-free ∼25 µm diameter microbumps with pitches of 50, 71, and 100 µm has been measured with and without underfill in four high chip stacks. With underfill, the unit thermal resistance values were 8.0, 15.5, and 19.0 C-mm 2 /W for 50, 71, and 100 µm pitch microbumps, respectively. The average microbump height was 16.1 microns. For the 50 µm pitch case, the thermal conduction through the underfill is roughly equal to that of the microbumps alone.