학술논문
16 Mb DRAM/SOI technologies for sub-1 V operation
Document Type
Conference
Author
Source
International Electron Devices Meeting. Technical Digest Electron devices Electron Devices Meeting, 1996. IEDM '96., International. :609-612 1996
Subject
Language
ISSN
0163-1918
Abstract
Extra low voltage DRAM/SOI technologies were developed using (1) modified MESA isolation without parasitic MOS operation, (2) dual gate CMOS for low Vth control, (3) optimized layout using both body-tied and floating body MOSFETs, and (4) reduced Cb/Cs ratio. Completely redesigned low voltage scheme 16 MDRAM/SOI was successfully realized and functional operation was obtained at very low supply voltage below 1 V.