부산대학교 도서관

In this paper, a micropower interface IC for a capacitive 3-axis micro-accelerometer is presented. The IC is implemented in a 0.25- $\mu{\hbox{m}}$ CMOS process. The fully-integrated sensor interface is based on a $\Delta\Sigma$ sensor front-end that operates mechanically in an open-loop configuration and converts the acceleration signals directly into the digital domain, thus avoiding the use of separate analog-to-digital converters. A detailed analysis with transfer functions is presented for the front-end circuit. Furthermore, the interface IC includes a decimator, a frequency reference, a clock generator for the front-end, a voltage and current reference, the required reference buffers, and low-dropout regulators (LDOs) needed for system-on-chip power management. The interface IC provides operating modes with 12-bit resolution for 1 and 25 Hz signal bandwidths. The former is optimized for very low power dissipation at the cost of reduced bandwidth, and is intended for example for activity monitoring in otherwise powered-off devices. The chip, with a 1.73 ${\hbox{mm}}^{2}$ active area, draws typically 21.2 $\mu{\hbox{A}}$ in the 1 Hz mode, and 97.6 $\mu{\hbox{A}}$ in the 25 Hz mode, from a 1.2–2.75 V supply. In the 1 and 25 Hz modes with a $\pm$ 4-g capacitive 3-axis accelerometer, the measured noise floors in the x-, y-, and z-directions are 1080, 1100 and 930 $\mu{\hbox{g}}/\sqrt{\hbox{Hz}}$, and 360, 320 and 275 $\mu{\hbox{g}}/\sqrt{\hbox{Hz}}$ , respectively. The implemented prototype achieves competitive Figures of Merit (FOMs) compared to the other published or commercially available, low-g, low-power accelerometers.