학술논문
Technological hybridization for efficient runtime reconfigurable FPGAs
Document Type
Conference
Author
Source
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) VLSI, 2007. ISVLSI '07. IEEE Computer Society Annual Symposium on. :29-34 Mar, 2007
Subject
Language
ISSN
2159-3469
2159-3477
2159-3477
Abstract
The goal of this paper is to propose an FPGA using emerging non volatile technologies for its configuration memory. Studies on magnetic memories have already been carried out [1] but solid electrolyte and phase change memories are also good candidates for such type of application. Features of these technologies can provide some interesting characteristics to the FPGA such as short writing time with non volatile technology. A small structure (RSRAM) for Remanent SRAM is used to convert information from these technologies into electrical information. This structure naturally provides some more features like partial and shadowed reconfiguration.