학술논문
Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators
Document Type
Conference
Author
Source
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) Custom integrated circuists Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004. :527-530 2004
Subject
Language
Abstract
This paper evaluates two techniques to improve the linearity of the main feedback D/A converter in multi-bit continuous-time sigma-delta modulators (CT-SDM). A self-calibrated current-steering (SCCS) implementation of the D/A converter is compared to the usage of a data-weighted averaging (DWA) algorithm on the selection of uncalibrated D/A-elements. Two test-chips including the two different solutions are presented and measurement results are compared. Clocked at 300 MHz, the two CT-SDMs achieve a dynamic range of 67 dB (DWA) and 70 dB (SCCS), respectively, over an analog bandwidth of 15 MHz.