학술논문
A 9.6 kb/s speech coder using the Bell laboratories DSP integrated circuit
Document Type
Conference
Author
Source
ICASSP '82. IEEE International Conference on Acoustics, Speech, and Signal Processing Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.. 7:1692-1695 1982
Subject
Language
Abstract
A digital speech coder has been designed for real-time operation for a data rate of 9.6 kb/s. The design is based on a combination of two speech compression techniques: Time-Domain Harmonic Scaling (TDHS) and Sub-Band Coding (SBC). It is a highly modularized hardware implementation using five Bell Laboratories Digital Signal Processor (DSP) integrated circuits as the key processing elements. Three DSPs are used in the encoder for pitch detection, TDHS compression and sub-band encoding. Another two DSPs are used in the receiver for sub-band decoding and TDHS expansion.