학술논문

Design and Quantum Cost Optimization of Ripple Counter using Information Reversal Logic Gates
Document Type
Conference
Source
2024 International Conference on IoT Based Control Networks and Intelligent Systems (ICICNIS) IoT Based Control Networks and Intelligent Systems (ICICNIS), 2024 International Conference on. :1206-1210 Dec, 2024
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Multiplexing
Thermodynamics
Costs
Quantum computing
Logic gates
Very large scale integration
Optics
Logic
Optimization
Nanotechnology
Quantum gate cost
Reversal Gates
Trash Outputs
Static circuits
CSWAP (Conditional Swap) gate
Controlled-Swap gate
Double Controlled-Swap gate
Asher Peres Gate
Logical Reversibility
Low Power VLSI
Tanner Tools
Circuit Implementation
Simulation
Language
Abstract
Information reversal logic (IRL) has emerged as a promising research area with potential applications across various fields. This research study focuses on designing static circuits, including full adders, subtractors, multiplexers, and comparators, using reversal ripple counters to minimize quantum gate cost. These counters are constructed using CSWAP gates, known for their low quantum gate overhead. IRL is characterized by the one-to-one mapping between input and output patterns, enabling reversible operations. This property aligns with the second law of thermodynamics, preventing heat dissipation. Key concepts in IRL include fan-out and feedback. Due to its low energy consumption, IRL has applications in quantum computing, optics, nanotechnology, and low-power VLSI. This research compares the trash output, quantum gate cost, and gate count of the designed circuits, which are simulated using T-Spice Tools v16.0.