부산대학교 도서관

Common-mode voltage is a key performance index when evaluating modulation methods in grid-tied converters, since it threatens specific loads, like motors, and introduces severe electromagnetic interference to power grid. Though many proposed methods decrease common mode voltage through not using zero voltage vectors, they bring more current distortion due to limited voltage vectors can be chosen. In this paper, a new method combining model prediction with NSPWM to realize low common mode voltage and less load current harmonic distortion is proposed. This paper predicts the current trajectories according to circuit and decides the optimal duration time of each voltage vector. The proposed method considers the tracking error at every conjunction time of adjacent vectors rather than only the end time of a period to reduce load current distortion and uses constraint high level time to avoid the appearance of zero voltage vector.