학술논문
18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm
Document Type
Conference
Author
Ahmad, F.; Mellati, A.; Fernandez, A.; Iyer, A.; Fan, A.; Reyes, B.; Abidin, C.; Nani, C.; Albano, D.; Solis, F.; Minoia, G.; Hatcher, G.; Carrer, H.; Kota, K.; Wang, L.; Bachu, M.; Garampazzi, M.; Hassanpourghadi, M.; Fan, N.; Prabha, P.; Nguyen, R.; Ho, S.; Dusatko, T.; Wu, T.; Elsharkasy, W.; Sun, Z.; Jantzi, S.; Tse, L.
Source
2024 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2024 IEEE International. 67:342-344 Feb, 2024
Subject
Language
ISSN
2376-8606
Abstract
The consistent demand for high-speed wireline communication due to high-performance computing and most recently due to machine learning and artificial intelligence has driven the development of transmitters operating beyond 100Gb/s per lane [1–4] and optical modules operating beyond 400Gb/s [4]. High-speed wireline communication requires high-bandwidth high-sampling rate ADCs and DACs with low-jitter PLLs as the main analog building blocks. In this paper, we present an energy-efficient optical transmitter fully integrated in an 800G coherent DSP chip using 4 reconfigurable 60-160GS/s 8b DACs with a 57GHz AFE bandwidth, fabricated in a 5nm FinFET process.