학술논문

Scaling the SOT track – A path towards maximizing efficiency in SOT-MRAM
Document Type
Conference
Source
2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023
Subject
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Nuclear Engineering
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Performance evaluation
Power demand
Switches
Size measurement
Standards
Magnetic tunneling
Stress measurement
Language
ISSN
2156-017X
Abstract
We demonstrate, for the first time, the functionality of a scaled perpendicular spin-orbit torque (SOT)-MRAM where the SOT layer and magnetic tunnel junction (MTJ) pillar exhibit comparable dimensions. This novel design leads to a significant reduction in the power consumption (63% decrease), an enhancement in endurance (>10 15 cycles), and a reduction in bit-cell area. Systematic investigations on device scaling are performed, highlighting the importance of SOT track scaling as a path to enhance the device performance by eliminating power consumption outside the MTJ pillar region. Furthermore, the hybrid free layer stack design offers a potential solution for scaling MTJ dimensions, as it enables low switching current and sufficient retention down to 20 nm.