학술논문
High Performance Nanosheet Technology Optimized for 77 K
Document Type
Conference
Author
Bao, R.; Qin, L.; Frougier, J.; Suk, S.; Rabie, M.; Bajpai, U.; Chou, A.; Nechay, B.; Mohamed, M.; Pujari, R.; Weir, T. J; Harmon, K.; Varma, A.; Armstrong-Moore, W.; Cestero, A.; Emans, S.; Hundekar, P.; Joshi, R.; Li, J.; Liu, X.; Lucarini, S.; Radens, C.; Siddiqui, S.; Trombley, H.; Bryant, A.; Hasanuzzaman, M.; Majumdar, A.; Sung, M.; Zhang, J.; Leobandung, E.
Source
2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023
Subject
Language
ISSN
2156-017X
Abstract
We provided process/integration solutions for high performance Nanosheet technology at 77 K and evaluated its performance benefits. This is the first demonstration of CMOS Nanosheet integration of dual work function metals (WFMs) and dual dipoles at 77 K. WFM engineering plus dual dipole engineering provides target threshold voltage (Vt) solution for Nanosheet technology at 77 K. Nanosheet with low V DD (0.3 - 0.4 V) at 77 K provides comparable performance to that at 300K with V DD =0.75V, but at much lower power. Nanosheet at 77 K also offers more than 100% performance gain than at 300 K with same V DD =0.75V. Junction/contact optimization and multiple Vts (multi-Vt) feasibility were demonstrated. TCAD was also developed to evaluate device performance and variations at 77 K.