학술논문

High Peformance 3D Flash Memory with 3.2Gbps Interface and 205MB/s Program Throughput based on CBA(CMOS Directly Bonded to Array) Technology

Document Type

Conference

Author

Kobayashi, S.; Tashiro, K.; Minemura, Y.; Nakagami, K.; Arita, K.; Oohashi, T.; Funayama, K.; Sakai, H.; Mushiga, M.; Okabe, K.; Kanno, Y.; Shimizu, S.; Fujikura, E.; Nakae, A.; Yamaguchi, K.; Yamawaki, H.; Nakajima, K.; Sato, M.

Source

2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023

Subject

Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Nuclear Engineering
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Three-dimensional displays
Microprocessors
Computer architecture
Throughput
Reliability
Flash memories
Electron devices

Language

ISSN

2156-017X

Abstract

We report the advantages of using CMOS directly bonded to array (CBA) technology in 3D flash memory. Improvements in interface speed, operation latency, and memory cell reliability are explored based on experimental and simulated data from 218-word-line (WL) stacked structures. The improvement derived from CBA enables BiCS FLASH™ generation 8 to operate with a high interface speed of 3.2Gbps and a high program throughput of 205MB/s with 3 bits per memory cell. A chip architecture to achieve well-scaled bit density of more than 18Gb/mm 2 , the world's highest in the 2xx- WL (about 218-232 WL) node, is also discussed.

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