학술논문
Investigation of Charge Trapping Induced Trap Generation in Si FeFET With Ferroelectric Hf0.5Zr0.5O2
Document Type
Periodical
Author
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 71(3):1845-1851 Mar, 2024
Subject
Language
ISSN
0018-9383
1557-9646
1557-9646
Abstract
We investigate charge trapping induced trap generation in Si ferroelectric field-effect transistor (FeFET) with ferroelectric Hf0.5Zr0.5O2/SiO2 gate stacks by split ${I}$ – ${V}$ measurement. We find that the recombination of electrons and holes within the gate stacks induces the generation of traps and consequently results in the degradation of the endurance characteristics of the FeFET. Therefore, by floating the body terminal, we suppress the hole injection into the gate stacks and the recombination and improve the endurance characteristics.