학술논문

Hybrid 2T nMOS/pMOS Gain Cell Memory With Indium-Tin-Oxide and Carbon Nanotube MOSFETs for Counteracting Capacitive Coupling
Document Type
Periodical
Source
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 45(2):188-191 Feb, 2024
Subject
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
MOSFET circuits
Transistors
Indium tin oxide
Couplings
Logic gates
Voltage
Leakage currents
2T gain cell
back-end-of-line
capacitive coupling
carbon nanotube
indium-tin-oxide
Language
ISSN
0741-3106
1558-0563
Abstract
We demonstrate a back-end-of-line (BEOL) compatible 2T gain cell consisting of n-type indium-tin-oxide (ITO) MOSFET as a write transistor and p-type carbon nanotube (CNT) MOSFET as a read transistor. The opposite polarities help counteract the capacitive coupling in gain cells operating with voltage sensing: the drop of the storage node voltage due to the capacitive coupling with the write wordline (gate of a write nMOSFET) is fully recovered at the time of enabling the read wordline (source of a read pMOSFET) for readout. With the low leakage of an ITO nMOSFET and the opposite polarity of the read transistor, retention time of more than 500 s is achieved at zero-volt standby voltage. The results suggest that the hybrid combination of n-ITO and p-CNT is a promising approach to improve gain cell operation in terms of read margin, retention, and read speed for 3D integrated all-BEOL gain cell memory above the silicon FET logic layer.