부산대학교 도서관

The majority of recently developed applications make use of System on Chip (SoC) devices. The device's rapid development relies on a variety of external clock sources. The effect of outside assaults and remaining assaults inside the FPGA are continue to increment. The proposed system uses low-power technology to develop a proposed pattern analysis algorithm (PAA) that addresses the issue of side channel attack. By testing the benchmark S22 circuit, the presented system can identify side channel attacks, forbidden attacks, reverse engineering probe patterns, and baiting attack scenarios. The benchmark circuit is implemented inside the SOC device XC6SLX9 and XILINX CPLD XC95144XL IC in order to test the compatibility of the proposed model. The simulation is evaluated using modelsim software and implementation is made using Xilinx ISE tool. Detection of SoC attacks inside the FPGA is detected and validated.