부산대학교 도서관

The last decade has witnessed the breakthrough of deep neural networks (DNNs) in many fields. With the increasing depth of DNNs, hundreds of millions of multiply-and-accumulate (MAC) operations need to be executed. To accelerate such operations efficiently, analog in-memory computing platforms based on emerging devices, e.g., resistive RAM (RRAM), have been introduced. These acceleration platforms rely on analog properties of the devices and thus suffer from process variations. Consequently, weights in neural networks configured into these platforms can deviate from the nominal trained values, which may lead to feature errors and a significant degradation of the inference accuracy. Besides, additional HW aspects represent key controlling factors for such computing platforms, namely, the limited RRAM cell programmable conductance levels, which limits the number of bits stored in one RRAM cell, the ADC noise converting analog values to digital domain and the ADC power scaling with the number of bits of its output. To address these points, in this article, we propose a framework to enhance the robustness of neural networks under variations. First, an enhanced Lipschitz constant regularization is adopted during neural network training to suppress the amplification of errors propagated through network layers. Additionally, the quantization setting of a NN model is optimized considering robustness against weight variations and total ADC power consumption. Afterward, error compensation is introduced at necessary locations determined by reinforcement learning (RL) to rescue the feature maps with remaining errors. Experimental results demonstrate that inference accuracy of neural networks can be recovered from as low as 1.69% under variations back to more than 95% of their original accuracy at the highest level of variations and reducing total ADC power consumption by 55% while the training and hardware cost are negligible.