학술논문

ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training

Document Type

Periodical

Author

Neethu, K.; Shahana, K.C.S.; James, R.K.; Jose, J.; Mandal, S.K.

Source

IEEE Design & Test IEEE Des. Test Design & Test, IEEE. 40(6):51-63 Dec, 2023

Subject

Computing and Processing
Components, Circuits, Devices and Systems
Training
Artificial neural networks
Random access memory
Energy efficiency
Topology
Fabrication
Energy consumption
Network-on-chip
DNN Training
2.5D Architecture
In-Memory Computing
Network-on-Package

Language

ISSN

2168-2356
2168-2364

Abstract

In this article, an architecture for in-memory computing (IMC)-based 2.5-D systems with multiple Network-on-Package (NoP) components is proposed.

Online Access

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