부산대학교 도서관

Synchronous rectification (SR) reduces conduction loss and improves efficiency by replacing antiparallel diodes with switching devices for rectification. However, determining SR signals for capacitor–inductor–inductor–capacitor (CLLC) converters is challenging. Existing SR strategies are open-loop and categorized into diode on-state detection and model-based calculation. The diode on-state detection requires high-speed, sophisticated sensors, and performance is sensitive to parasitic elements. The model-based calculation is robust, but current mathematical models are only effective for specific operating conditions. For more reliable and accurate SR signals, this article proposes a deep-learning-aided closed-loop SR strategy. It includes an analytically solvable deep-learning model and a closed-loop optimization algorithm. The deep-learning model is a compact, computing-friendly neural network trained with fast-generated training datasets. It gives initial SR signals under all possible operating conditions accurately. The closed-loop optimization is gradient descent on the heat-sink temperature measured by low-cost thermocouples against SR phase shifts. It eliminates model deviations caused by ideal-to-actual differences in circuit parameters and achieves the ideal SR state, which minimizes the conduction loss and heat-sink temperature. Experiment results on the 400-/300-V, 2.4-kW SiC-based CLLC prototype indicate that the proposed SR strategy consistently achieves the design purpose under various operating conditions with efficiency improvement of at least 1.74% points.