학술논문

Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
Document Type
Periodical
Source
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 44(7):1212-1215 Jul, 2023
Subject
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Temperature measurement
Temperature
MOSFET
Current measurement
Pulse measurements
Thermal resistance
Logic gates
III-V
MOSFETs
self-heating
vertical nanowires
Language
ISSN
0741-3106
1558-0563
Abstract
We investigate self-heating in vertical, gate-all-around III-V InAs/InGaAs nanowire MOSFETs using pulsed IV measurements at various temperatures. Low temperature measurements reveal a negative output conductance indicating self-heating in the transistor. Under pulsed measurements, an increase in drain current (15%) and transconductance (30%) are observed at room temperature, with values influenced by the pulse width. This effect on performance is quantified with determination of the thermal resistance and capacitance. Furthermore, a first order thermal circuit is modelled based on the thermal impedances. The results indicate that the intrinsic temperature rises to 385 K when the device is operated in DC at room temperature (300 K) with a thermal time constant of $1~\mu \text{s}$ . We find that self-heating is a limiting factor for device performance.